- Cuts analog test costs by 90%
- Simplifies testing of complex, crowded chips
- Slashes test time for analog sections
- Enables in-life testing
- Available for ADCs & DACs
Welcome to ATEEDA
The ultimate IP and tools for analog tests
ATEEDA’s LinBIST suite of EDA tools and silicon-proven IP provide dramatic reductions in the cost of analog test. Our philosophy is simple but extremely powerful, just like our tests: Exploit intelligence, not brute force. Our tools employ very smart algorithms to create very simple tests that only require the tiny and robust analog IP we provide.
Contact Us
ATEEDA Test Development and BIST Tools
Email:
Tel: +44 (0)131 272 2754
Simplified Test Access
Chips are becoming so crowded they are nearly impossible to test, especially for System-on-Chip and System-in-Package products.
LinBIST removes the need to provide test access for each analog block, saving pins and avoiding the need for complicated test multiplexers.
Reduced Test Costs
Analog Test Equipment is expensive, and has limited capacity for running tests simultaneously.
LinBIST allows analog System-on-Chip blocks to be tested in parallel on low-cost digital test equipment, resulting in up to 90% saving in test cost.
Read more about saving money with LinBIST.
Latest News
ATEEDA’s LinBIST receives additional validation by STMicroelectronics (05-Jul-2011)
ATEEDA’s LinBIST recently received additional validation by STMicroelectronics as a BIST alternative to high capital cost conventional analog test equipment.- Read item
ATEEDA joins the Cadence Connections program (13-May-2011)
ATEEDA, a world leader in semiconductor test solutions, is delighted to have joined the Cadence Connections program.- Read item