ATEEDA secures funds for semiconductor test technology

05-Feb-2007

IDMs trial world-leading solution for testing mixed signal integrated circuits

ATEEDA, a spinout led by a top team of serial entrepreneurs, has raised seed funding to commercialise leading-edge semiconductor technology with the potential to deliver dramatic cost savings for mixed-signal integrated device manufacturers (IDMs).

The company, which is headed by Chief Executive and Co-Founder David Hamilton, secured backing from a consortium of backers led by Chairman and Cofounder Peter Denyer. It also included the Scottish Seed Fund which is managed by Scottish Enterprise, the Synergy Fund which is managed by Scottish Equity Partners, and the University of Strathclyde.

Hamilton, who has led research and development projects for major hi-tech companies, heads a highly experienced team. It includes Cofounder and Chief Financial Officer Bill Buckie and fellow Cofounder and Non-Executive Director Jane Karwoski McCracken, both of whom have been involved with several high-growth businesses, as well as Peter Denyer, a serial technology investor and entrepreneur.

ATEEDA, founded in 2006, specializes in testing semiconductor circuits known as mixed signal devices which have both analog and digital sections. These are the fastest growing area of the semiconductor business and found in virtually all consumer products.
There are well-established methods for testing digital sections but ATEEDA has developed the world's first effective test for analogue sections on digital testers, enabling manufacturers to save time and money. David Hamilton, CEO of ATEEDA said: "We have developed the solution semiconductor manufacturers have been seeking for years. Our technology marks a significant step-change for the industry and we're hugely excited by our global growth prospects."

The technology was developed from a project at the Department of Electronic and Electrical Engineering at the University of Strathclyde in Glasgow. It was funded by Scottish Enterprise's Proof of Concept programme and also supported by the Technology Talent Initiative.

Chairman Peter Denyer said:" We are delighted to be backed by funders with such excellent track records in this dynamic sector. I look forward to helping ATEEDA build a world class business."

Rob Moffat, Synergy Fund Manager for Scottish Equity Partners, a leading UK venture capital firm with more than £300 million under management, said: "ATEEDA has the hallmarks we seek in an early stage start-up - world class technology and a large market opportunity supported by an effective technical team and experienced board."

The seed funding round, in which law firm Morton Fraser acted for ATEEDA, will enable the company to accelerate its product development plans by expanding its internal engineering team and strengthening relationships with its strategic customers and development partners.

Trials of the technology, which dramatically reduces the cost of testing electronic circuits during the production process, are already underway with several major integrated device manufacturers.

Pat McHugh, Scottish Seed Fund Manager for Scottish Enterprise commented: "ATEEDA is a great example of a young innovative company with the potential to grow quickly and become a global leader in its field. Startup and young growing companies in Scotland now have access to finance through the Scottish Seed Fund."

Stuart Mackenzie, Spin-out Company Development Manager at The University of Strathclyde said: "ATEEDA's breakthrough marks the latest example of world class technology spun out of The University of Strathclyde. The project benefited from early support from Scottish Enterprise and the new funds will enable ATEEDA to take advantage of major growth opportunities.

OptimATE© is ATEEDA's core product, offering a unique combination of features and benefits, particularly for mixed signal semiconductor manufacturers including: reduced production test time; reduced test cost; simplifies test equipment requirements; and improved statistical information about test coverage.

It was developed by a team with a unique mix of expertise in analog circuit design, artificial intelligence and digital signal processing as well as both academic and commercial experience.