Reduced Test Costs
Test Cost Savings
Our customers tell us that the cost of testing analog (and mixed signal) blocks can be up to 20% of the price of the finished System-on-Chip (SoC). There are a number of significant components to these costs:
- Test development
- Wafer probe
- Cost of using both analog and digital testers
- Time spent on analog tester (real cost 5 to 15 cents/second)
- Packaged device
- Cost of using both analog and digital testers
- Time spent on analog tester
In contrast, time on digital testers is much less expensive, with some quoting figures below 3 cents/second.
By building a very small additional block into the chip, LinBIST enables analog blocks to be tested on digital testers. As these have a significantly lower cost per second than analog testers, this leads to a substantial saving.
BIST can run simultaneously on several convertors, further reducing test time and cost.
For chips where all the blocks can be tested using LinBIST, there is no need for an analog tester at all.
In this case, the time and cost associated with putting the wafer or packaged device on an analog tester is completely eliminated.
In summary, LinBIST and WaveBIST reduce test cost in three ways:
- Uses cheaper digital testers
- Saves time by executing tests in parallel
- For some designs, eliminates the need for an analog tester altogether
Improving Packaged Yield with BIST
Test managers tell us that analog test is currently too expensive to use at wafer probe for many products. Often wafers are not placed on an analog tester at all, or only partial tests are carried out.
BIST reduces test costs so significantly that it becomes viable to test analog blocks at wafer probe. This can deliver further cost savings by rejecting bad parts before packaging costs are incurred.